WPI CHIPS Design Studio

A new low-power, high-precision inverter-based CMOS comparator is introduced in this paper. Inherent high-power consumption of CMOS inverter is controlled by a current-limiting circuit. A current-modulation technique is proposed to maximize the gain of the comparator before making its decision. The comparator uses two unfolded inverters and a sampling circuit to complete its operation. The current-modulation circuit uses a programmable current mirror and a 5-bit counter without adding much power to the original circuit. An auxiliary comparator and a reference generator are implemented to control the current modulation operation. The circuit presented addresses the gain error resulting from charge injection in the inverter and corrects the error arising from incorrect reset operation. The circuit was simulated in a standard 180nm CMOS process. Simulations show up to 3x improvement of the comparator’s gain with very high precision. Only one calibration circuit is required for any number of comparators; hence, this technique can be used to achieve high-resolntion ADCs.

We have developed electrochemical bandage (e-bandage) prototypes that generate the reactive oxygen species hypochlorous acid (HOCl) or hydrogen peroxide (H2O2) for potential use to treat biofilm-infected wounds in humans. We have shown that both e-bandage-generated HOCl and H2O2 kill biofilms in vitro and in infected wounds on mice, with the former being more active in vitro. The H2O2-generating e-bandage, more so than the HOCl-generating e-bandage, was associated with improved healing of infected wounds. Here, a strategy in which H2O2 and HOCl are alternately generated—for dual action—was explored. The goal was to develop a programmable multimodal wearable potentiostat [PMWP] that can generate HOCl or H2O2, as needed. An ultralow-power microcontroller unit was developed to manage operation of the PMWP. The system was operated with a 260-mAh capacity coin battery and weighed 4.6 g, making it suitable for future small animal experiments (and ultimately, potential evaluation in humans). As assessed using electrochemical parameters, the device functioned comparably to a commercial benchtop potentiostat. To confirm antimicrobial activity, PMWP-controlled e-bandages were tested in vitro against clinical isolates of methicillin-resistant Staphylococcus aureus, Pseudomonas aeruginosa, Acinetobacter baumannii, Enterococcus faecium, and Candida auris. When programmed to deliver HOCl followed by H2O2, PMWP-controlled e-bandages exhibited activity against biofilms of all study isolates tested. Finally, we demonstrated the PMWP’s usability in a murine wound infection model.

The low-light performance of image sensors can be enhanced by designing high-effective conversion gain signal paths from photon conversion sites to chip outputs. This can be achieved by using high-gain in-pixel amplifiers, high-gain column amplifiers, and by reducing the conversion capacitance of photon-sensing nodes. However, each of these approaches presents unique challenges and limitations that have restricted their widespread adoption in low-light applications. This article reviews the use of in-pixel gain amplifiers and their signal chain electronics in high-conversion-gain complementary metal-oxide-semiconductor (CMOS) image sensors over the past two decades. In-pixel gain amplifiers are classified into different categories according to the type of amplification technique used. Analyses of the column-referred conversion gain and the noise of each topology are presented alongside the different metrics used to characterize CMOS image sensor pixels for low-light imaging applications. The performance metrics of various in-pixel gain amplifiers are compared, providing a framework that highlights the best achieved input-referred noise in CMOS image sensors over the past 15 years. Furthermore, different tradeoffs are examined between optimizing conversion gain, pixel full-well capacity, and input read noise in both voltage and charge domains.

This paper presents the design of a high-precision, low-voltage inverter-based comparator. The comparator employs current-limiting and current calibration circuits to reduce power consumption and improve precision by correcting the errors associated with the inaccurate reset operation of the comparator. An analytical model was developed to determine the optimum operating point for the voltage gain and the effects of reset operation on the characteristics of the comparator. The model was verified through simulations using the TSMC 0.18-um N-well CMOS process and was used to develop current-mode calibration and power-reduction techniques to improve the gain of the comparator. The simulations showed an improvement in the gain by a factor of with minimal added power consumption. Monte Carlo and process corner simulations were performed to verify the effectiveness of the proposed calibration technique. A 5-bit flash and 12-bit SAR analog-to-digital converters (ADCs) were designed using the new comparator and calibration technique as a proof of concept to demonstrate the superiority of the calibration technique, which significantly improved the resolution of the ADC. Thus, it was concluded that the proposed current-limited current-calibrated (CLCC) inverter-based comparator can be used in high-precision, low-voltage data converters in applications where resolution and supply voltage are critical design considerations.